二手 TERADYNE Catalyst #145333 待售
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ID: 145333
Tester
Configuration:
2 processor system
Processor 1: 1280 MHz sparcv9 (online)
Processor 2: 1280 MHz sparcv9 (online)
PCI based system
Terabus is present
TCI is present
CATALYST_TH 1
BACKPLANE A
#Slot Type Num XptA XptB Name
2 879-858-35 0 # 23 24 PLFD CC
3 879-858-25 0 # 21 22 PLFS CC
4 000-000-00 0 # 19 20 EMPTY
5 879-792-01 0 # 17 18 TIME CC
6 879-857-01 0 # 15 16 PMM CC-01
7 000-000-00 0 # 13 14 EMPTY
8 949-658-00 0 # 11 12 LFAC DUAL CC
9 949-658-00 0 # 9 10 LFAC DUAL CC
10 949-681-50 0 # 7 8 VHFAWG400 DIFF CC
11 949-672-50 0 # 5 6 VHFDIG CC
14 803-594-00 0 # 25 26 UHFSRC CC
15 803-596-05 0 # 27 28 UWPORT
16 803-595-00 0 # 29 30 UWMM
17 949-643-00 0 # 31 32 TJD CC
18 803-596-05 0 # 33 34 UWPORT
19 803-594-00 0 # 35 36 UHFSRC CC
20 803-594-00 0 # 37 38 UHFSRC CC
21 000-000-00 0 # 39 40 EMPTY
22 879-858-25 0 # 41 42 PLFS CC
23 879-858-35 0 # 43 44 PLFD CC
1 949-669-00 0 # 3 0 HAS (Left HAS LA669-00)
13 949-668-00 0 # 0 0 CATALYST HAC
12 949-667-00 0 # 0 0 DIF
24 949-669-01 0 # 4 0 HAS (Right HAS LA669-01)
END
RF_PIPES 1
pipe-name slot schan description
Z8A 15 1 # UWPORT (OSP)
Z7A 15 2 # UWPORT (OSP)
Z6A 15 3 # UWPORT (OSP)
Z5A 15 4 # UWPORT (OSP)
Z4A 18 1 # UWPORT (OSP)
Z3A 18 2 # UWPORT (OSP)
Z2A 18 3 # UWPORT (OSP)
Z1A 18 4 # UWPORT (OSP)
END
RF_CONNECTIONS 1
RF pipe connections between channel cards
slot schan slot schan
14 1 to 15 5
16 3 to 15 7
19 1 to 18 5
20 1 to 18 6
16 1 to 18 7
END
Up to 4 Precision AC Card Cages are allowed
PRECISION_AC 1
Slot Type Num Name
1 949-718-00 0 # PLFDIG TCI
2 879-764-01 0 # PLFSRC
3 879-779-00 0 # 1M SMEM
4 949-660-01 0 # LFACDIG
5 949-660-00 0 # LFACDIG
6 949-659-00 0 # LFACSRC
7 949-659-00 0 # LFACSRC
8 949-671-01 0 # PACS CAGE INT
END
PRECISION_AC 2
Slot Type Num Name
1 949-718-00 0 # PLFDIG TCI
2 879-764-01 0 # PLFSRC
3 879-779-00 0 # 1M SMEM
4 949-827-00 0 # VHFAWG
5 949-664-00 0 # VHFDIG MF
6 949-320-00 0 # UWMS
7 949-608-00 0 # VHFAWG
8 949-671-01 0 # PACS CAGE INT
END
Up to 8 Universal Backplane/Synch Power Subsystem cages are allowed
For the Synch Power Subsystem:
Slot Type Name Instr1 # Instr2 # Ammeter #
Instr1 # - insrument connected to the first two matrix lines
Instr2 # - insrument connected to the last two matrix lines
Ammeter # - ammeter connection
to AVOID errors, put NO 0 if no instrument is connected.
UB_SPS_CAGE 1
Slot Type Num Name
1 879-802-02 0 # UB_SPS_802
2 517-301-00 0 # UB_APU
3 517-301-00 0 # UB_APU
4 517-301-00 0 # UB_APU
5 517-301-00 0 # UB_APU
6 517-301-00 0 # UB_APU
7 517-301-00 0 # UB_APU
8 517-301-00 0 # UB_APU
9 517-301-00 0 # UB_APU
10 517-301-00 0 # UB_APU
11 517-301-00 0 # UB_APU
12 517-301-00 0 # UB_APU
13 517-301-00 0 # UB_APU
14 879-925-01 0 # UB_60_V_SRC MAT 1
15 879-925-01 0 # UB_60_V_SRC DUT 1
16 879-925-01 0 # UB_60_V_SRC MAT 2
17 879-925-01 0 # UB_60_V_SRC MAT 3
18 879-925-01 0 # UB_60_V_SRC MAT 5
19 879-925-01 0 # UB_60_V_SRC DUT 5
21 879-690-00 0 # UB_ASY
22 517-300-01 0 # UB_TJ300
END
HSD100_CHAN_CAGE 1
Slot Type Num Fld1 Fld2 Name
1 949-921-01 0 # HSD CDM 400
2 949-921-01 0 # HSD CDM 400
3 949-921-01 0 # HSD CDM 400
4 949-921-01 0 # HSD CDM 400
5 949-820-10 0 # HSD CSB
6 949-921-01 0 # HSD CDM 400
7 949-921-01 0 # HSD CDM 400
8 949-921-01 0 # HSD CDM 400
9 949-921-01 0 # HSD CDM 400
END
HSD100_CHAN_CAGE 2
Slot Type Num Fld1 Fld2 Name
5 949-820-00 0 # HSD CSB
END
CATALYST_TH 1
BACKPLANE B
Slot Type Num Name
29 949-626-10 0 # HSD THS
43 949-625-00 0 # HSD DTH
44 949-625-00 0 # HSD DTH
45 949-625-00 0 # HSD DTH
46 949-625-00 0 # HSD DTH
47 949-626-20 0 # HSD THS/HCLK
48 949-625-00 0 # HSD DTH
49 949-625-00 0 # HSD DTH
50 949-625-00 0 # HSD DTH
51 949-625-00 0 # HSD DTH
61 949-625-00 0 # HSD DTH
62 949-625-00 0 # HSD DTH
63 949-625-00 0 # HSD DTH
64 949-625-00 0 # HSD DTH
65 949-626-00 0 # HSD THS
66 949-625-00 0 # HSD DTH
67 949-625-00 0 # HSD DTH
68 949-625-00 0 # HSD DTH
69 949-625-00 0 # HSD DTH
74 949-626-10 0 # HSD THS
END
Trigger Switch Yard
Note: The logical slot numbers below correspond to the physical slot numbers only for test systems which contain a TSY card cage. In test systems which contain an SCS/TSY card cage the mapping is:
Logical TSY slot (below) Physical slot
1 -> 2
3 -> 1
TSY CAGE
Slot Type Num Name
1 879-655-02 0 # TSY
2 000-000-00 0 # EMPTY
3 000-000-00 0 # EMPTY
4 000-000-00 0 # EMPTY
END
Time Subsystem
TIME_SUBSYSTEM
# Board ID Name
879-793-00 # TMS Timer
879-794-01 # TMS Counter
879-795-01 # TMS Support
END
# The UWMS option resides in the PACS cage and is composed of two
# plug-in modules that may reside in one of three locations A, B or C.
# A zero in the type field indicates no plug-in module.
# PACS_UW <n> - indicates PACS cage number of these UWMS options
# Slot - indicates slot number and module position for this UWMS option
# Type - board identification number
# AWG Num - AWG instrument number connected to this UWMS option
# UHFSRC Num - UHF instrument number that has this UWMS option
# MODSRC Num - First or second MODSRC connected to above UHFSRC
#
PACS_UW 2
# AWG UHFSRC MODSRC
#Slot Type Rev Date Num Num Num Name
6 949-320-00 A 9943-0 2 1 1 # UWMS
6A 949-330-00 A 9944-0 # UWMS UP CONV
6B 000-000-00 0 0000-0
6C 949-333-00 C 9948-0 # UWMS MUX
END
#
#
# The UWPORT option modules are composed of plug-in modules.
# The names list in the first column indicate the presence of
# the option modules for the uwport.
#
UWPORT_OPTIONS_HEAD 1
#
# Name Slot Type Rev Num Date
PORT 15 803-596-05 A 1 # 0122-0
NOISE 15 733-104-00 A 1 # 9923-0
PORT 18 803-596-05 A 2 # 0122-0
NOISE 18 733-104-00 A 2 # 9923-0
END
#
# DC Subsystem -
#
# SRC <NUM> [1 - 13]
# (sources 1-5 are MATRIX sources 1-5
# sources 6-13 are DUT sources 1-8)
# HCU <NUM> *[1 - 4]
# REF HCU <NUM> *[1 - 4]
# HVSRC <NUM> *[1 - 4]
# PWRSRC <NUM> [1 - 4]
# DATABITS <NUM> - <NUM> [1 - 192]
#
# ** These instruments share the same seven-slot cage -- only one
# instrument is allowed per slot.
#
DC_SUBSYSTEM
# UBVI 60 1 ( 60V V/I Source in Universal Backplane 1 : slot 14)
# UBVI 60 2 ( 60V V/I Source in Universal Backplane 1 : slot 16)
# UBVI 60 3 ( 60V V/I Source in Universal Backplane 1 : slot 17)
HCU 4
# UBVI 60 5 ( 60V V/I Source in Universal Backplane 1 : slot 18)
# UBVI 60 6 ( 60V V/I Source in Universal Backplane 1 : slot 15)
HCU 7
HCU 8
HCU 9
# UBVI 60 10 ( 60V V/I Source in Universal Backplane 1 : slot 19)
DATABITS 1 - 48
# UB_MATRIX
#
# Testhead 1
# XPTs UB Cage Slot Type
# 1-4 1 2 APU
# 5-8 1 3 APU
# 9-12 1 4 APU
# 13-16 1 5 APU
# 17-20 1 6 APU
# 21-24 1 7 APU
# 25-28 1 8 APU
# 29-32 1 9 APU
# 33-36 1 10 APU
# 37-40 1 11 APU
# 41-44 1 12 APU
# 45-48 1 13 APU
END.
TERADYNE Catalyst是一款功能强大、先进的最终测试设备,旨在将半导体测试解决方桉的成本和复杂性降至最低。它旨在优化测试时间、减少地板空间要求和提高设备的使用时间质量。Catalyst测试系统使用最新技术来自动化测试过程，并使用不依赖复杂测试程序的单元内智能和自动化降低成本。它采用高速测试复制、并行编程、集成诊断和智能,业界领先的测试速度高达800 MHz。TERADYNE Catalyst测试机提供了广泛的解决方桉,包括扫描功能、高操作员访问和高级故障定位,以测试来自多个制造商的设备。它具有一触式测试设置和Flexforce支持,可加快测试编程速度。它还包括一个用于实时监控结果的质量屈服控制器,以实现更全面的实时QA穷举感官I/O支持,这使Catalyst能够检测故障设备并防止其运送给客户。该工具还具有高级调试功能,可更快、更高效地进行实验。这些功能包括高级别的可追踪性和全自动测试分析。这包括基于资产级别硬件解决方桉和软件的自动化测试生成和执行功能。该模型还支持静态、动态和逻辑故障覆盖、内存测试和实时监控。TERADYNE Catalyst最终测试设备旨在满足当今半导体公司的高需求和自动化解决方桉。它提供了一个强大的测试系统来简化测试过程。它提供了高级自动化、诊断和智能功能,可快速识别故障、缩短测试时间、降低成本并提高产品质量。
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