二手 TERADYNE Catalyst #9189297 待售

製造商
TERADYNE
模型
Catalyst
ID: 9189297
RF Test system Processor 1: 450 MHz sparcv9 (Online) Processor 3: 450 MHz sparcv9 (Online) PCI Based system Terabus TCI Catalyst_TH 1 Backplane A: Slot Type Num XptA XptB Name 2 000-000-00 0 23 24 Empty 3 000-000-00 0 21 22 Empty 4 000-000-00 0 19 20 Empty 5 879-792-01 0 17 18 Time CC 6 939-227-50 0 15 16 GIGADIG CC 7 949-916-50 0 13 14 AWGLAN CC 8 000-000-00 0 11 12 Empty 9 879-906-51 0 9 10 VHFCW CC 10 949-681-50 0 7 8 VHFAWG400 DIFF CC 11 949-831-50 0 5 6 1G VHFD CC 14 949-681-50 0 25 26 VHFAWG400 DIFF CC 15 949-831-50 0 27 28 1G VHFD CC 16 803-595-02 0 29 30 UWMM 17 000-000-00 0 31 32 Empty 18 803-596-07 0 33 34 UWPORT 19 803-594-00 0 35 36 UHFSRC CC 20 803-594-00 0 37 38 UHFSRC CC 21 000-000-00 0 39 40 Empty 22 000-000-00 0 41 42 Empty 23 000-000-00 0 43 44 Empty 1 949-669-00 0 3 0 HAS (Left HAS LA669-00) 13 949-668-00 0 0 0 CATALYST HAC 12 949-667-00 0 0 0 DIF 24 949-669-01 0 4 0 HAS (Right HAS LA669-01) End RF_Pipe 1: Pipe-name Slot Schan Description Z4A 18 1 UWPORT (OSP) Z3A 18 2 UWPORT (OSP) Z2A 18 3 UWPORT (OSP) Z1A 18 4 UWPORT (OSP) Z4A 18 1 UWPORT (OSP) Z3A 18 2 UWPORT (OSP) Z2A 18 3 UWPORT (OSP) Z1A 18 4 UWPORT (OSP) Z12C 6 3 GIGADIG CC (OSP) Z10C 6 5 GIGADIG CC (OSP) Z9C 11 9 1G VHFD CC (OSP) Z8C 15 9 1G VHFD CC (OSP) Z5C 18 5 UWPORT (OSP) Z4C 18 6 UWPORT (OSP) Z12C 6 3 GIGADIG CC (OSP) Z10C 6 5 GIGADIG CC (OSP) Z5C 18 5 UWPORT (OSP) Z4C 18 6 UWPORT (OSP) Z12D 6 1 GIGADIG CC (OSP) Z10D 6 4 GIGADIG CC (OSP) Z9D 11 8 1G VHFD CC (OSP) Z8D 15 8 1G VHFD CC (OSP) Z5D 18 7 UWPORT (OSP) Z4D 18 8 UWPORT (OSP) Z12D 6 1 GIGADIG CC (OSP) Z10D 6 4 GIGADIG CC (OSP) Z5D 18 7 UWPORT (OSP) Z4D 18 8 UWPORT (OSP) End RF_Connections 1: RF Pipe connections between channel cards slot schan slot schan 16 1 to 18 7 19 1 to 18 5 20 1 to 18 6 End Precision_AC 1: Slot Type Num Name 1 949-664-00 0 VHFDIG MF 2 949-664-00 0 VHFDIG MF 3 949-915-01 0 AWGLAN (8Meg) 4 949-827-00 0 VHFAWG 5 949-827-00 0 VHFAWG 6 949-320-00 0 UWMS 7 000-000-00 0 Empty 8 949-671-01 0 PACS CAGE INT End Precision_AC 2: Slot Type Num Name 1 949-664-20 0 GIGADIG MF 2 000-000-00 0 Empty 3 000-000-00 0 Empty 4 000-000-00 0 Empty 5 949-320-00 0 UWMS 6 000-000-00 0 Empty 7 000-000-00 0 Empty 8 949-671-01 0 PACS CAGE INT End UB_SPS_Cage 1: Slot Type Num Name 1 879-802-02 0 UB_SPS_802 2 517-301-01 0 UB_MATRIX 3 517-301-01 0 UB_MATRIX 4 517-301-01 0 UB_MATRIX 5 517-301-01 0 UB_MATRIX 6 517-301-01 0 UB_MATRIX 7 517-301-01 0 UB_MATRIX 8 517-301-01 0 UB_MATRIX 9 517-301-01 0 UB_MATRIX 10 517-301-01 0 UB_MATRIX 11 517-301-01 0 UB_MATRIX 12 517-301-01 0 UB_MATRIX 13 517-301-01 0 UB_MATRIX 14 879-925-01 0 UB_60_V_SRC MAT 1 15 879-925-01 0 UB_60_V_SRC DUT 1 16 879-925-01 0 UB_60_V_SRC MAT 3 17 879-925-01 0 UB_60_V_SRC MAT 2 21 879-690-00 0 UB_ASY 22 517-300-01 0 UB_TJ300 End HSD100_Chan_cage 1: Slot Type Num Fld1 Fld2 Name 1 949-921-01 0 HSD CDM 400 2 949-921-01 0 HSD CDM 400 3 949-921-01 0 HSD CDM 400 4 949-921-01 0 HSD CDM 400 5 949-920-10 0 HSD CSB End HSD100_Chan_Cage 2: #Slot Type Num Fld1 Fld2 Name 5 949-820-00 0 HSD CSB End Catalyst_TH 1: Backplane B: Slot Type Num Name 29 949-626-10 0 HSD THS 47 949-626-10 0 HSD THS 61 949-625-00 0 HSD DTH 62 949-625-00 0 HSD DTH 63 949-625-00 0 HSD DTH 64 949-625-00 0 HSD DTH 65 949-626-00 0 HSD THS 66 949-625-00 0 HSD DTH 67 949-625-00 0 HSD DTH 68 949-625-00 0 HSD DTH 69 949-625-00 0 HSD DTH 74 949-626-10 0 HSD THS End Logical TSY slot (below) Physical slot 1 -> 2 3 -> 1 TSY Cage: Slot Type Num Name 1 879-655-02 0 TSY 2 000-000-00 0 Empty 3 000-000-00 0 Empty 4 000-000-00 0 Empty End PACS_UW 1 AWG UHFSRC MODSRC Slot Type Rev Date Num Num Num Name 6 949-320-00 A 0226-0 2 1 1 UWMS 6A 949-330-00 A 9944-0 UWMS UP CONV 6B 000-000-00 0 0000-0 6C 949-333-00 C 0308-0 UWMS MUX End PACS_UW 2: AWG UHFSRC MODSRC Slot Type Rev Date Num Num Num Name 5 949-320-00 A 0226-0 2 1 2 UWMS 5A 949-330-20 A 0312-0 MODSRC6000 UP CONV 5B 000-000-00 0 0000-0 5C 939-204-00 A 0331-0 MODSRC6000 MUX END UWPort_Options_Head 1: Name Slot Type Rev Num Date PORT 18 803-596-07 B 1 0306-0 NOISE 18 733-104-00 A 1 9923-0 End DC Subsystem SRC <NUM> [1 - 13] (sources 1-5 are MATRIX sources 1-5 sources 6-13 are DUT sources 1-8) HCU <NUM> *[1 - 4] REF HCU <NUM> *[1 - 4] HVSRC <NUM> *[1 - 4] PWRSRC <NUM> [1 - 4] DATABITS <NUM> - <NUM> [1 - 192] DC_Subsystem: UBVI 60 1 (60V V/I Source in Universal Backplane 1 : slot 14) UBVI 60 2 (60V V/I Source in Universal Backplane 1 : slot 17) UBVI 60 3 (60V V/I Source in Universal Backplane 1 : slot 16) HCU 4 UBVI 60 6 (60V V/I Source in Universal Backplane 1 : slot 15) HCU 7 HCU 8 HCU 9 DATABITS 1 - 48 UB_Matrix test head 1: XPTs UB Cage Slot Type 1-4 1 2 Matrix 5-8 1 3 Matrix 9-12 1 4 Matrix 13-16 1 5 Matrix 17-20 1 6 Matrix 21-24 1 7 Matrix 25-28 1 8 Matrix 29-32 1 9 Matrix 33-36 1 10 Matrix 37-40 1 11 Matrix 41-44 1 12 Matrix 45-48 1 13 Matrix End.
TERADYNE Catalyst是为最终测试目的而设计的强大系统。它通过控制何时以及如何在设备内的高功率电路上应用和验证数据来加速测试过程。它的模块化设计使它可以定制以满足几乎任何测试要求。该系统包括一套TERADYNE开发的基于软件的解决方桉,包括Catalyst Tester、TERADYNE Catalyst Pin Planner、Catalyst Load Board Designer和TERADYNE Catalyst Setup/Closing TOolset。Catalyst Tester是一个强大的测试驱动程序,它利用TERADYNE Catalyst硬件的高级功能来简化高功率设备测试的开发和维护。它由交互式图形用户界面组成,用于快速测试设置和参数设置的实时控制。Catalyst Tester支持快速插座控制、可编程门和精确计时,而其自动测试排序使使用变得简单。TERADYNE Catalyst Pin Planner是一个集成的环境,它利用软件算法和高带宽硬件在人工方法所需时间的一小部分内实现自动引脚规划。它为设备测试过程增加了智能,同时确保了最准确的引脚分配。Catalyst Load Board Designer是用于创建支持高功率应用程序的测试板布局的交钥匙解决方桉。它简化了电路板设计、材料选择和成本优化、布局优化自动化、电流密度检查和元件放置。TERADYNE Catalyst Setup/Closing Toolset是一个功能强大的工具箱,用于处理测试设置和关闭操作的复杂性,包括路由、连接映射、I/O多路复用、缩放器通道宽度选择和参考级别匹配。它提供了易于使用和全面的工具,大大减少了调试和设置时间。Catalyst提供了一个高级的最终测试结构,统一了数据管理和在单个平台上的测试执行。它的模块化体系结构为高功耗应用程序带来了前所未有的灵活性,它结合了最佳的TERADYNE创新技术来推动经济高效的测试和高质量的性能。
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